AMD Geode SC3200 Manuel d'utilisateur

AMD Geode™ SC3200 Processor Data BookAMD Geode™ SC3200 Processor Data BookFebruary 2007Publication ID: 32581C

10 AMD Geode™ SC3200 Processor Data BookList of Tables32581CTable 5-29. Banks 0 and 1 - Common Control and Status Registers . . . . . . . . . . . . .

100 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.4.2.4 LDN 03h and 08h - Serial Ports 1 and 2Serial Ports 1 and 2 are identical, except

AMD Geode™ SC3200 Processor Data Book 101SuperI/O Module 32581C5.4.2.5 LDN 05h and 06h - ACCESS.bus Ports 1 and 2ACCESS.bus ports 1 and 2 (ACB1 and AC

102 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.4.2.6 LDN 07h - Parallel Port The Parallel Port supports all IEEE 1284 standard commu-

AMD Geode™ SC3200 Processor Data Book 103SuperI/O Module 32581C5.5 Real-Time Clock (RTC) The RTC provides timekeeping and calendar managementcapabilit

104 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CExternal ElementsChoose C1 and C2 capacitors (see Figure 5-5 on page103) to match the cr

AMD Geode™ SC3200 Processor Data Book 105SuperI/O Module 32581C5.5.2.4 TimekeepingData FormatTime is kept in BCD or binary format, as determined by bi

106 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.5.2.6 Power SupplyThe device is supplied from two supply voltages, as shownin Figure 5

AMD Geode™ SC3200 Processor Data Book 107SuperI/O Module 32581C5.5.2.7 System Power StatesThe system power state may be No Power, Power On,Power Off o

108 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.5.2.9 Interrupt HandlingThe RTC has a single Interrupt Request line which handlesthe f

AMD Geode™ SC3200 Processor Data Book 109SuperI/O Module 32581C5.5.3 RTC RegistersThe RTC registers can be accessed (see Section 5.4.2.1"LDN 00h

AMD Geode™ SC3200 Processor Data Book 11List of Tables32581CTable 6-22. F3: PCI Header Registers for Audio Support Summary . . . . . . . . . . . . .

110 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CIndex 03h Minutes Alarm Register - MINA (R/W) Reset Type: VPP PUR7:0 Minutes Alarm Data.

AMD Geode™ SC3200 Processor Data Book 111SuperI/O Module 32581C3 Reserved. This bit is defined as “Square Wave Enable” by the MC146818 and is not supp

112 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CTable 5-21. Divider Chain Control / Test SelectionDV2 DV1 DV0ConfigurationCRA6 CRA5 CRA4

AMD Geode™ SC3200 Processor Data Book 113SuperI/O Module 32581C5.5.3.1 Usage Hints1) Read bit 7 of CRD at each system power-up to vali-date the conten

114 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.6 System Wakeup Control (SWC)The SWC wakes up the system by sending a power-uprequest

AMD Geode™ SC3200 Processor Data Book 115SuperI/O Module 32581C5.6.2 SWC RegistersThe SWC registers are organized in two banks. The offsetsare related

116 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CTable 5-29. Banks 0 and 1 - Common Control and Status RegistersBit DescriptionOffset 00h

AMD Geode™ SC3200 Processor Data Book 117SuperI/O Module 32581CTable 5-30. Bank 1 - CEIR Wakeup Configuration and Control RegistersBit DescriptionBank

118 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CCEIR Wakeup Range 1 RegistersThese two registers (IRWTR1L and IRWTR1H) define the low an

AMD Geode™ SC3200 Processor Data Book 119SuperI/O Module 32581C5.7 ACCESS.bus InterfaceThe SC3200 has two ACCESS.bus (ACB) controllers. ACBis a two-wi

12 AMD Geode™ SC3200 Processor Data BookList of Tables32581CTable 9-19. PCI Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . .

120 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.7.3 Acknowledge (ACK) CycleThe ACK cycle consists of two signals: the ACK clock pulses

AMD Geode™ SC3200 Processor Data Book 121SuperI/O Module 32581C5.7.4 Acknowledge After Every Byte RuleAccording to this rule, the master generates an

122 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CSending the Address ByteWhen the device is the active master of the ACCESS.bus(ACBST[1]

AMD Geode™ SC3200 Processor Data Book 123SuperI/O Module 32581CMaster Error DetectionThe ACB detects illegal Start or Stop Conditions (i.e., aStart or

124 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.7.10 ACB RegistersEach functional block is associated with a Logical DeviceNumber (LDN

AMD Geode™ SC3200 Processor Data Book 125SuperI/O Module 32581C2 NMATCH (New Match). (R/W1C) Writing 0 to this bit is ignored. If ACBCTL1[2] is set, a

126 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C4 ACK (Acknowledge). This bit is ignored in transmit mode. When the device acts as a rec

AMD Geode™ SC3200 Processor Data Book 127SuperI/O Module 32581C5.8 Legacy Functional BlocksThis section briefly describes the following blocks that pr

128 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C Table 5-35. Parallel Port Bit Map for First Level OffsetOffset NameBits76543210000h DAT

AMD Geode™ SC3200 Processor Data Book 129SuperI/O Module 32581C5.8.2 UART Functionality (SP1 and SP2)Both SP1 and SP2 provide UART functionality. The

AMD Geode™ SC3200 Processor Data Book 131Overview 32581C1.0Overview1.1 General DescriptionThe AMD Geode™ SC3200 processor is a member of theAMD Geode

130 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CTable 5-38. Bank Selection EncodingBSR BitsBank Selected765432100xxxxxxx 010xxxxxx 111xx

AMD Geode™ SC3200 Processor Data Book 131SuperI/O Module 32581CTable 5-42. Bank 0 Bit MapRegister BitsOffsetName7654321000h RXD RXD[7:0] (Receiver Dat

132 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CTable 5-44. Bank 2 Bit MapRegister BitsOffsetName7654321 000h BGD(L) BGD[7:0] (Low Byte)

AMD Geode™ SC3200 Processor Data Book 133SuperI/O Module 32581C5.8.3 IR Communications Port (IRCP) / Serial Port 3 (SP3) FunctionalityThis section des

134 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CTable 5-47. Bank Selection EncodingBSR BitsBank Selected Functionality765432100xxxxxxx 0

AMD Geode™ SC3200 Processor Data Book 135SuperI/O Module 32581CTable 5-50. Bank 3 Register MapOffset Type Name00h RO MID. Module and Revision Identifi

136 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CTable 5-53. Bank 6 Register MapOffset Type Name00h R/W IRCR3. IR Control 301h R/W MIR_PW

AMD Geode™ SC3200 Processor Data Book 137SuperI/O Module 32581CTable 5-56. Bank 1 Bit MapRegister BitsOffsetName7654321000h LBGD(L) LBGD[7:0] (Low Byt

138 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C06h RFRML(L)/RFRCC(L)RFRML[7:0] / RFRCC[7:0] (Low Byte Data)07h RFRML(H)/RFRCC(H)RSVD RF

AMD Geode™ SC3200 Processor Data Book 1396Core Logic Module 32581C6.0Core Logic ModuleThe Core Logic module is an enhanced PCI-to-Sub-ISAbridge (South

14 AMD Geode™ SC3200 Processor Data BookOverview32581C1.2 FeaturesGeneral Features 32-Bit x86 processor, up to 266 MHz, with MMX instruc-tion set sup

140 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581CIntegrated Audio • AC97 Version 2.0 compliant interface to audio codecs• Secondary cod

AMD Geode™ SC3200 Processor Data Book 141Core Logic Module 32581C6.2.1 Fast-PCI Interface to External PCI BusThe Core Logic module provides a PCI bus

142 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.2.1 Video Retrace InterruptBit 7 of the “Serial Packet” can be used to generate an

AMD Geode™ SC3200 Processor Data Book 143Core Logic Module 32581CFor example, if a channel had one Mode 4 device and oneMode 0 device, then the Mode 4

144 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.3.4 UltraDMA/33 ModeThe IDE controller of the Core Logic module supportsUltraDMA/3

AMD Geode™ SC3200 Processor Data Book 145Core Logic Module 32581C6.2.4 Universal Serial BusThe Core Logic module provides three complete, indepen-dent

146 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.5.1 Sub-ISA Bus CyclesThe ISA bus controller issues multiple ISA cycles to satisfy

AMD Geode™ SC3200 Processor Data Book 147Core Logic Module 32581CFigure 6-3. PCI to ISA Cycles with Delayed Transaction Enabled6.2.5.3 Sub-ISA Bus Dat

148 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.5.5 ISA DMADMA transfers occur between ISA I/O peripherals and sys-tem memory (i.e

AMD Geode™ SC3200 Processor Data Book 149Core Logic Module 32581C6.2.5.6 ROM InterfaceThe Core Logic module positively decodes memoryaddresses 000F000

AMD Geode™ SC3200 Processor Data Book 15Overview 32581C PCI Bus Interface:— PCI v2.1 compliant with wakeup capability— 32-Bit data path, up to 33 MHz—

150 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581CFigure 6-6. PCI Change to Sub-ISA and Back6.2.6 AT Compatibility LogicThe Core Logic m

AMD Geode™ SC3200 Processor Data Book 151Core Logic Module 32581CDMA Transfer Modes Each DMA channel can be programmed for single, block,demand or ca

152 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581CDMA Addressing CapabilityDMA transfers occur over the entire 32-bit address range ofth

AMD Geode™ SC3200 Processor Data Book 153Core Logic Module 32581C6.2.6.3 Programmable Interrupt ControllerThe Core Logic module contains two 8259A-equ

154 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581CPIC Interrupt SequenceA typical AT-compatible interrupt sequence is as follows.Any unm

AMD Geode™ SC3200 Processor Data Book 155Core Logic Module 32581C6.2.7.1 I/O Port 092h System ControlI/O Port 092h allows for a fast keyboard assertio

156 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.9 Power Management LogicThe Core Logic module integrates advanced power man-agemen

AMD Geode™ SC3200 Processor Data Book 157Core Logic Module 32581C6.2.9.2 Sleep StatesThe SC3200 supports four Sleep states (SL1-SL3) and theSoft Off s

158 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.9.3 Power Planes ControlThe SC3200 supports up to three power planes. Three sig-na

AMD Geode™ SC3200 Processor Data Book 159Core Logic Module 32581CPower ButtonThe power button (PWRBTN#) input provides two events: awake request, and

16 AMD Geode™ SC3200 Processor Data BookOverview32581C

160 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.10 Power Management ProgrammingThe power management resources provided by a com-bi

AMD Geode™ SC3200 Processor Data Book 161Core Logic Module 32581CThe automatic speedup events (video and IRQ) for Sus-pend Modulation should be used t

162 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.10.3 Peripheral Power ManagementThe Core Logic module provides peripheral power ma

AMD Geode™ SC3200 Processor Data Book 163Core Logic Module 32581CPower Management SMI Status Reporting RegistersThe Core Logic module updates status r

164 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.10.4 Power Management Programming SummaryTable 6-9 provides a programming register

AMD Geode™ SC3200 Processor Data Book 165Core Logic Module 32581C6.2.11 GPIO InterfaceUp to 64 GPIOs in the in the Core Logic module are pro-vided for

166 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581CPhysical Region Descriptor Table AddressBefore the bus master starts a master transfer

AMD Geode™ SC3200 Processor Data Book 167Core Logic Module 32581C4) Read the SMI Status register to clear the Bus MasterError and End of Page bits (bi

168 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.12.2 AC97 Codec InterfaceThe AC97 codec (e.g., LM4548) is the master of the serial

AMD Geode™ SC3200 Processor Data Book 169Core Logic Module 32581C6.2.12.3 VSA Technology Support HardwareThe Core Logic module incorporates the requir

AMD Geode™ SC3200 Processor Data Book 172Architecture Overview 32581C2.0Architecture OverviewAs illustrated in Figure 1-1 on page 13, the SC3200 pro-c

170 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581CIn Fast Path Write, the Core Logic module responds towrites to the following addresses

AMD Geode™ SC3200 Processor Data Book 171Core Logic Module 32581C6.2.12.4 IRQ Configuration RegistersThe Core Logic module provides the ability to set

172 AMD Geode™ SC3200 Processor Data BookCore Logic Module32581C6.2.12.6 LPC Interface Signal DefinitionsThe LPC specification lists seven required an

AMD Geode™ SC3200 Processor Data Book 173Core Logic Module - PCI Configuration Space and Access Methods 32581C6.3 Register DescriptionsThe Core Logic

174 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Register Summary32581C6.3.2 Register SummaryThe tables in this subsection summarize the r

AMD Geode™ SC3200 Processor Data Book 175Core Logic Module - Register Summary 32581C6Ch-6Fh 32 R/W ROM Mask Register 0000FFF0h Page 19870h-71h 16 R/W

176 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Register Summary32581CB8h 8 RO DMA Shadow Register xxh Page 215B9h 8 RO PIC Shadow Regist

AMD Geode™ SC3200 Processor Data Book 177Core Logic Module - Register Summary 32581CTable 6-15. F0BAR0: GPIO Support Registers SummaryF0BAR0+I/O Offse

178 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Register Summary32581CTable 6-17. F1: PCI Header Registers for SMI Status and ACPI Suppor

AMD Geode™ SC3200 Processor Data Book 179Core Logic Module - Register Summary 32581CTable 6-19. F1BAR1: ACPI Support Registers SummaryF1BAR1+I/O Offse

18 AMD Geode™ SC3200 Processor Data BookArchitecture Overview32581CTable 2-1. SC3200 Memory Controller Register SummaryGX_BASE+Memory OffsetWidth(Bits

180 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Register Summary32581CTable 6-20. F2: PCI Header Registers for IDE Controller Support Sum

AMD Geode™ SC3200 Processor Data Book 181Core Logic Module - Register Summary 32581CTable 6-21. F2BAR4: IDE Controller Support Registers SummaryF2BAR4

182 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Register Summary32581CTable 6-23. F3BAR0: Audio Support Registers SummaryF3BAR0+MemoryOff

AMD Geode™ SC3200 Processor Data Book 183Core Logic Module - Register Summary 32581CTable 6-24. F5: PCI Header Registers for X-Bus Expansion Support S

184 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Register Summary32581CTable 6-26. PCIUSB: USB PCI Configuration Register SummaryPCIUSB In

AMD Geode™ SC3200 Processor Data Book 185Core Logic Module - Register Summary 32581CTable 6-27. USB_BAR: USB Controller Registers Summary USB_BAR0+Mem

186 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Register Summary32581CTable 6-28. ISA Legacy I/O Register Summary I/O Port Type Name Refe

AMD Geode™ SC3200 Processor Data Book 187Core Logic Module - Register Summary 32581C487h R/W DMA Channel 0 High Page Register Page 300489h R/W DMA Cha

188 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C6.4 Chipset Register SpaceThe Chipset R

AMD Geode™ SC3200 Processor Data Book 189Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C4 Memory Write and Invalidate. Allow t

AMD Geode™ SC3200 Processor Data Book 19Architecture Overview 32581C4 RFSHTST (Test Refresh). This bit, when set high, generates a refresh request. Th

190 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex 08h Device Revision ID Register (

AMD Geode™ SC3200 Processor Data Book 191Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex 40h PCI Function Control Registe

192 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C1 Power Management Configuration Trap.

AMD Geode™ SC3200 Processor Data Book 193Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C2 IDE Reset. Reset IDE bus.0: Disable.

194 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex 4Ch-4Fh Top of System Memory (R/W

AMD Geode™ SC3200 Processor Data Book 195Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex 52h ROM/AT Logic Control Registe

196 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex 54h-59h Reserved Reset Value: 00h

AMD Geode™ SC3200 Processor Data Book 197Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C4 Secondary IDE Controller Positive De

198 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex 60h-63h ACPI Control Register (R/

AMD Geode™ SC3200 Processor Data Book 199Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex 70h-71h IOCS1# Base Address Regi

2 AMD Geode™ SC3200 Processor Data Book© 2007 Advanced Micro Devices, Inc. All rights reserved.The contents of this document are provided in connectio

20 AMD Geode™ SC3200 Processor Data BookArchitecture Overview32581CGX_BASE+8408h-840Bh MC_BANK_CFG (R/W) Reset Value: 41104110h31:16 RSVD (Reserved).

200 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex 78h-7Bh DOCCS# Base Address Regis

AMD Geode™ SC3200 Processor Data Book 201Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C1 Idle Timers. Device idle timers.0: D

202 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C3 Keyboard/Mouse Idle Timer Enable. Tur

AMD Geode™ SC3200 Processor Data Book 203Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex 82h Power Management Enable Regi

204 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C1 Floppy Disk Access Trap.0: Disable.1:

AMD Geode™ SC3200 Processor Data Book 205Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C2 Video Retrace Interrupt SMI. Allow S

206 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex 85h Second Level PME/SMI Status M

AMD Geode™ SC3200 Processor Data Book 207Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex 86h Second Level PME/SMI Status

208 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex 87h Second Level PME/SMI Status M

AMD Geode™ SC3200 Processor Data Book 209Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex 89h General Purpose Timer 1 Cont

AMD Geode™ SC3200 Processor Data Book 21Architecture Overview 32581C11 RSVD (Reserved). Write as 0.10:8 RRD (ACT(0) to ACT(1) Command Period, tRRD). M

210 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex 8Ah General Purpose Timer 2 Coun

AMD Geode™ SC3200 Processor Data Book 211Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex 8Eh VGA Timer Count Register (R/

212 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex 96h Suspend Configuration Registe

AMD Geode™ SC3200 Processor Data Book 213Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex 9Eh-9Fh Keyboard / Mouse Idle Ti

214 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex ACh-ADh Secondary Hard Disk Idle

AMD Geode™ SC3200 Processor Data Book 215Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex B8h DMA Shadow Register (RO) Res

216 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex BBh RTC Index Shadow Register (RO

AMD Geode™ SC3200 Processor Data Book 217Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581CIndex CCh User Defined Device 1 Contr

218 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581CIndex ECh Timer Test Register (R/W) Res

AMD Geode™ SC3200 Processor Data Book 219Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C4 User Defined Device Idle Timer 1 (UD

22 AMD Geode™ SC3200 Processor Data BookArchitecture Overview32581C2.1.2 Fast-PCI BusThe GX1 module communicates with the Core Logic mod-ule via a Fas

220 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C3 Keyboard/Mouse Access Trap SMI Status

AMD Geode™ SC3200 Processor Data Book 221Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C2 Codec SDATA_IN SMI Status. Indicates

222 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C6.4.1.1 GPIO Support RegistersF0 Index

AMD Geode™ SC3200 Processor Data Book 223Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581COffset 10h-13h GPDO1 — GPIO Data Out 1

224 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C5:0 Signal Select. Selects the GPIO sig

AMD Geode™ SC3200 Processor Data Book 225Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C4 PME Edge/Level Select. Selects the t

226 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C6.4.1.2 LPC Support RegistersF0 Index 1

AMD Geode™ SC3200 Processor Data Book 227Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C8 IRQ8# Source. Selects the interface

228 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C14 IRQ14 Polarity. If LPC is selected a

AMD Geode™ SC3200 Processor Data Book 229Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C2 SMI# Polarity. This bit allows signa

AMD Geode™ SC3200 Processor Data Book 23Architecture Overview 32581C• Sub-ISA: See Section 3.4.7 "Sub-ISA Interface Signals" on page 57, Sec

230 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581C2 DRQ2 Source. Selects the interface so

AMD Geode™ SC3200 Processor Data Book 231Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C1 LPC Serial Port 0 Addressing. Serial

232 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Bridge, GPIO, and LPC Registers - Function 032581COffset 18h-1Bh LAD_D1 — LPC Address Dec

AMD Geode™ SC3200 Processor Data Book 233Core Logic Module - Bridge, GPIO, and LPC Registers - Function 0 32581C3 LPC Timeout Error Status. Indicates

234 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581C6.4.2 SMI Status and ACPI Registers - Fun

AMD Geode™ SC3200 Processor Data Book 235Core Logic Module - SMI Status and ACPI Registers - Function 1 32581C6.4.2.1 SMI Status Support RegistersF1 I

236 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581C6 SMI Source is a VGA Timer Event. Indica

AMD Geode™ SC3200 Processor Data Book 237Core Logic Module - SMI Status and ACPI Registers - Function 1 32581C12 SMI Source is NMI. (Read to Clear) In

238 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581C1 SMI Source is Audio Subsystem. (Read On

AMD Geode™ SC3200 Processor Data Book 239Core Logic Module - SMI Status and ACPI Registers - Function 1 32581C0 SMI Source is Expired General Purpose

24 AMD Geode™ SC3200 Processor Data BookArchitecture Overview32581C

240 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581COffset 08h-09h SMI Speedup Disable Regist

AMD Geode™ SC3200 Processor Data Book 241Core Logic Module - SMI Status and ACPI Registers - Function 1 32581COffset 22h-23h Second Level ACPI PME/SMI

242 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581C21 EXT_SMI5 SMI Status. (Read to Clear) I

AMD Geode™ SC3200 Processor Data Book 243Core Logic Module - SMI Status and ACPI Registers - Function 1 32581C10 EXT_SMI2 SMI Status. (Read Only) Indi

244 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581C0 EXT_SMI0 SMI Enable. When this bit is a

AMD Geode™ SC3200 Processor Data Book 245Core Logic Module - SMI Status and ACPI Registers - Function 1 32581C6.4.2.2 ACPI Support RegistersF1 Index 4

246 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581C0 PWRBTN_DBNC_DIS (Power Button Debounce)

AMD Geode™ SC3200 Processor Data Book 247Core Logic Module - SMI Status and ACPI Registers - Function 1 32581C4 BM_STS (Bus Master Status). Indicates

248 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581C13 SLP_EN (Sleep Enable). (Write Only) Al

AMD Geode™ SC3200 Processor Data Book 249Core Logic Module - SMI Status and ACPI Registers - Function 1 32581COffset 0Fh ACPI_BIOS_EN Register (R/W)

AMD Geode™ SC3200 Processor Data Book 253Signal Definitions 32581C3.0Signal DefinitionsThis section defines the signals and describes the externalinte

250 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581C7 Reserved. Must be set to 0.6 USB_STS. I

AMD Geode™ SC3200 Processor Data Book 251Core Logic Module - SMI Status and ACPI Registers - Function 1 32581COffset 12h-13h GPE0_EN — General Purpos

252 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581COffset 14h GPWIO Control Register 1 (R/W)

AMD Geode™ SC3200 Processor Data Book 253Core Logic Module - SMI Status and ACPI Registers - Function 1 32581COffset 16h GPWIO Data Register (R/W) Res

254 AMD Geode™ SC3200 Processor Data BookCore Logic Module - SMI Status and ACPI Registers - Function 132581C3:0 SCI_IRQ_ROUTE. SCI is routed to:0000:

AMD Geode™ SC3200 Processor Data Book 255Core Logic Module - IDE Controller Registers - Function 2 32581C6.4.3 IDE Controller Registers - Function 2Th

256 AMD Geode™ SC3200 Processor Data BookCore Logic Module - IDE Controller Registers - Function 232581CIndex 30h-3Fh Reserved Reset Value: 00hIndex 4

AMD Geode™ SC3200 Processor Data Book 257Core Logic Module - IDE Controller Registers - Function 2 32581CIndex 44h-47h Channel 0 Drive 0 DMA Control R

258 AMD Geode™ SC3200 Processor Data BookCore Logic Module - IDE Controller Registers - Function 232581CIndex 50h-53h Channel 1 Drive 0 PIO Register (

AMD Geode™ SC3200 Processor Data Book 259Core Logic Module - IDE Controller Registers - Function 2 32581C6.4.3.1 IDE Controller Support RegistersF2 In

26 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CFigure 3-1. Signal Groups (Continued)The remaining subsections of this chapter descr

260 AMD Geode™ SC3200 Processor Data BookCore Logic Module - IDE Controller Registers - Function 232581COffset 08h IDE Bus Master 1 Command Register —

AMD Geode™ SC3200 Processor Data Book 261Core Logic Module - Audio Registers - Function 3 32581C6.4.4 Audio Registers - Function 3The register designa

262 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Audio Registers - Function 332581C6.4.4.1 Audio Support RegistersF3 Index 10h, Base Addre

AMD Geode™ SC3200 Processor Data Book 263Core Logic Module - Audio Registers - Function 3 32581C16 Codec Status Valid. (Read Only) Indicates if the st

264 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Audio Registers - Function 332581C4 Audio Bus Master 2 SMI Status. Indicates if an SMI wa

AMD Geode™ SC3200 Processor Data Book 265Core Logic Module - Audio Registers - Function 3 32581C4 Audio Bus Master 2 SMI Status. Indicates if an SMI w

266 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Audio Registers - Function 332581C12 DMA Trap SMI Status. (Read to Clear) Indicates if an

AMD Geode™ SC3200 Processor Data Book 267Core Logic Module - Audio Registers - Function 3 32581C5 Low MPU I/O Trap. If this bit is enabled and an acce

268 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Audio Registers - Function 332581C7 IRQ7 Internal. Configures IRQ7 for internal (software

AMD Geode™ SC3200 Processor Data Book 269Core Logic Module - Audio Registers - Function 3 32581C20 Mask Internal IRQ4. (Write Only)0: Disable.1: Enabl

AMD Geode™ SC3200 Processor Data Book 27Signal Definitions 32581C3.1 Ball AssignmentsThe SC3200 is highly configurable as illustrated in Figure3-1 on

270 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Audio Registers - Function 332581C1 Assert Masked Internal IRQ1. 0: Disable.1: Enable.0 R

AMD Geode™ SC3200 Processor Data Book 271Core Logic Module - Audio Registers - Function 3 32581COffset 28h Audio Bus Master 1 Command Register (R/W) R

272 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Audio Registers - Function 332581COffset 30h Audio Bus Master 2 Command Register (R/W) Re

AMD Geode™ SC3200 Processor Data Book 273Core Logic Module - Audio Registers - Function 3 32581COffset 38h Audio Bus Master 3 Command Register (R/W) R

274 AMD Geode™ SC3200 Processor Data BookCore Logic Module - Audio Registers - Function 332581COffset 40h Audio Bus Master 4 Command Register (R/W) Re

AMD Geode™ SC3200 Processor Data Book 275Core Logic Module - Audio Registers - Function 3 32581COffset 48h Audio Bus Master 5 Command Register (R/W) R

276 AMD Geode™ SC3200 Processor Data BookCore Logic Module - X-Bus Expansion Interface - Function 532581C6.4.5 X-Bus Expansion Interface - Function 5T

AMD Geode™ SC3200 Processor Data Book 277Core Logic Module - X-Bus Expansion Interface - Function 5 32581CIndex 1Ch-1Fh Base Address Register 3 - F5B

278 AMD Geode™ SC3200 Processor Data BookCore Logic Module - X-Bus Expansion Interface - Function 532581CIndex 44h-47h F5BAR1 Mask Address Register (R

AMD Geode™ SC3200 Processor Data Book 279Core Logic Module - X-Bus Expansion Interface - Function 5 32581CIndex 64h-67h Scratchpad: Usually used for C

28 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CFigure 3-2. BGU481 Ball Assignment DiagramSSSSSSSSS12345678910111213141516171819202122

280 AMD Geode™ SC3200 Processor Data BookCore Logic Module - X-Bus Expansion Interface - Function 532581C6.4.5.1 X-Bus Expansion Support RegistersF5 I

AMD Geode™ SC3200 Processor Data Book 281Core Logic Module - X-Bus Expansion Interface - Function 5 32581COffset 04h-07h I/O Control Register 2 (R/W)

282 AMD Geode™ SC3200 Processor Data BookCore Logic Module - USB Controller Registers - PCIUSB32581C6.4.6 USB Controller Registers - PCIUSBThe registe

AMD Geode™ SC3200 Processor Data Book 283Core Logic Module - USB Controller Registers - PCIUSB 32581CIndex 06h-07h Status Register (R/W) Reset Value:

284 AMD Geode™ SC3200 Processor Data BookCore Logic Module - USB Controller Registers - PCIUSB32581CIndex 14h-2Bh Reserved Reset Value: 00hIndex 2Ch-2

AMD Geode™ SC3200 Processor Data Book 285Core Logic Module - USB Controller Registers - PCIUSB 32581CTable 6-42. USB_BAR+Memory Offset: USB Controller

286 AMD Geode™ SC3200 Processor Data BookCore Logic Module - USB Controller Registers - PCIUSB32581C6 RootHubStatusChange. This bit is set when the co

AMD Geode™ SC3200 Processor Data Book 287Core Logic Module - USB Controller Registers - PCIUSB 32581C6 RootHubStatusChangeEnable. 0: Ignore.1: Disable

288 AMD Geode™ SC3200 Processor Data BookCore Logic Module - USB Controller Registers - PCIUSB32581COffset 34h-37h HcFmInterval Register (R/W) Reset V

AMD Geode™ SC3200 Processor Data Book 289Core Logic Module - USB Controller Registers - PCIUSB 32581C7:0 NumberDownstreamPorts (Read Only). USB suppor

AMD Geode™ SC3200 Processor Data Book 29Signal Definitions 32581CTable 3-2. BGU481 Ball Assignment - Sorted by Ball NumberBallNo. Signal NameI/O(PU/PD

290 AMD Geode™ SC3200 Processor Data BookCore Logic Module - USB Controller Registers - PCIUSB32581COffset 54h-57h HcRhPortStatus[1] Register (R/W) Re

AMD Geode™ SC3200 Processor Data Book 291Core Logic Module - USB Controller Registers - PCIUSB 32581C1 Read: PortEnableStatus. 0: Port disabled.1: Por

292 AMD Geode™ SC3200 Processor Data BookCore Logic Module - USB Controller Registers - PCIUSB32581C3 Read: PortOverCurrentIndicator. This bit reflect

AMD Geode™ SC3200 Processor Data Book 293Core Logic Module - USB Controller Registers - PCIUSB 32581C8 Read: PortPowerStatus. This bit reflects the po

294 AMD Geode™ SC3200 Processor Data BookCore Logic Module - USB Controller Registers - PCIUSB32581C1 EmulationInterrupt (Read Only). This bit is a st

AMD Geode™ SC3200 Processor Data Book 295Core Logic Module - ISA Legacy Register Space 32581C6.4.7 ISA Legacy Register SpaceThe ISA Legacy registers r

296 AMD Geode™ SC3200 Processor Data BookCore Logic Module - ISA Legacy Register Space32581C2 Channel 2 Terminal Count. Indicates if TC was reached.0:

AMD Geode™ SC3200 Processor Data Book 297Core Logic Module - ISA Legacy Register Space 32581CI/O Port 00Bh DMA Channel Mode Register, Channels 3:0 (WO

298 AMD Geode™ SC3200 Processor Data BookCore Logic Module - ISA Legacy Register Space32581CI/O Port 0D0h (R/W)Read DMA Status Register, Channels 7:4N

AMD Geode™ SC3200 Processor Data Book 299Core Logic Module - ISA Legacy Register Space 32581CI/O Port 0D2h Software DMA Request Register, Channels 7:4

AMD Geode™ SC3200 Processor Data Book 3Contents 32581CContentsList of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

30 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CB6 AD23 I/O INPCI, OPCIVIOCycle MultiplexedA23 O OPCIB7 VSSGND --- --- ---B8 RD# O O3/

300 AMD Geode™ SC3200 Processor Data BookCore Logic Module - ISA Legacy Register Space32581CI/O Port 0DEh DMA Write Mask Register Command, Channels 7:

AMD Geode™ SC3200 Processor Data Book 301Core Logic Module - ISA Legacy Register Space 32581CTable 6-45. Programmable Interval Timer Registers Bit Des

302 AMD Geode™ SC3200 Processor Data BookCore Logic Module - ISA Legacy Register Space32581CI/O Port 042hWrite PIT Timer 2 Counter (Speaker)7:0 Counte

AMD Geode™ SC3200 Processor Data Book 303Core Logic Module - ISA Legacy Register Space 32581CTable 6-46. Programmable Interrupt Controller Registers B

304 AMD Geode™ SC3200 Processor Data BookCore Logic Module - ISA Legacy Register Space32581C2 IRQ2 / IRQ10 Mask.0: Not Masked.1: Mask.1 IRQ1 / IRQ9 Ma

AMD Geode™ SC3200 Processor Data Book 305Core Logic Module - ISA Legacy Register Space 32581C3 IRQ3 / IRQ11 Pending.0: Yes.1: No.2 IRQ2 / IRQ10 Pendin

306 AMD Geode™ SC3200 Processor Data BookCore Logic Module - ISA Legacy Register Space32581CTable 6-47. Keyboard Controller Registers Bit DescriptionI

AMD Geode™ SC3200 Processor Data Book 307Core Logic Module - ISA Legacy Register Space 32581CTable 6-48. Real-Time Clock RegistersBit DescriptionI/O P

308 AMD Geode™ SC3200 Processor Data BookCore Logic Module - ISA Legacy Register Space32581C3 IRQ3 Edge or Level Sensitive Select. Selects PIC IRQ3 se

AMD Geode™ SC3200 Processor Data Book 3097Video Processor Module 32581C7.0Video Processor ModuleThe Video Processor module contains a high performance

AMD Geode™ SC3200 Processor Data Book 31Signal Definitions 32581CC15 VSSGND --- --- ---C16 AVSSPLL2GND --- --- ---C175,2SLCT I INTVIOPMR[23]3 = 0 and

310 AMD Geode™ SC3200 Processor Data BookVideo Processor Module32581C7.1 Module ArchitectureFigure 7-1 shows a top-level block diagram of the VideoPro

AMD Geode™ SC3200 Processor Data Book 311Video Processor Module 32581C7.2 Functional DescriptionTo understand why the Video Processor functions as itd

312 AMD Geode™ SC3200 Processor Data BookVideo Processor Module32581CFigure 7-2. NTSC 525 Lines, 60 Hz, Odd Field Figure 7-3. NTSC 525 Lines, 60 Hz, E

AMD Geode™ SC3200 Processor Data Book 313Video Processor Module 32581C7.2.1 Video Input Port (VIP)The VIP block is designed to interface the SC3200 wi

314 AMD Geode™ SC3200 Processor Data BookVideo Processor Module32581CThe GenLock control hardware is used to synchronize thevideo input’s field with t

AMD Geode™ SC3200 Processor Data Book 315Video Processor Module 32581CFigure 7-5. Capture Video Mode Bob Example Using One Video Frame BufferWeaveThe

316 AMD Geode™ SC3200 Processor Data BookVideo Processor Module32581C3) Field Interrupt.When the field interrupt occurs on the completion of anodd fie

AMD Geode™ SC3200 Processor Data Book 317Video Processor Module 32581C7.2.2 Video BlockThe Video block receives video data from the VIP block orthe GX

318 AMD Geode™ SC3200 Processor Data BookVideo Processor Module32581C7.2.2.2 Horizontal Downscaler with 4-Tap FilteringThe Video Processor implements

AMD Geode™ SC3200 Processor Data Book 319Video Processor Module 32581C7.2.2.3 Line BuffersAfter the data has been optionally horizontally downscaledth

32 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CD10 GPIO1 I/O(PU22.5)INT, O3/5VIOPMR[23]3 = 0 and PMR[13] = 0IOCS1# O(PU22.5)O3/5VIOPM

320 AMD Geode™ SC3200 Processor Data BookVideo Processor Module32581C7.2.3 Mixer/Blender BlockThe Mixer/Blender block of the Video Processor moduleper

AMD Geode™ SC3200 Processor Data Book 321Video Processor Module 32581C7.2.3.1 YUV to RGB CSC in Video Data PathThis CSC must be enabled if the video d

322 AMD Geode™ SC3200 Processor Data BookVideo Processor Module32581C7.2.3.4 Color/Chroma Key and Mixer/BlenderThe Mixer/Blender takes each pixel of t

AMD Geode™ SC3200 Processor Data Book 323Video Processor Module 32581CMixing/Blending OperationTable 7-2 on page 323 shows the truth table used to cre

324 AMD Geode™ SC3200 Processor Data BookVideo Processor Module32581CFigure 7-12. Color Key and Alpha Blending LogicColor register enabled for this wi

AMD Geode™ SC3200 Processor Data Book 325Video Processor Module 32581C7.2.4 TFT InterfaceThe TFT interface can be programmed to one of two sets ofball

326 AMD Geode™ SC3200 Processor Data BookVideo Processor Module32581C7.2.5 Integrated PLLThe integrated PLL can generate frequencies up to 135MHz from

AMD Geode™ SC3200 Processor Data Book 327Video Processor Module - Register Summary32581C7.3 Register DescriptionsThe register space for accessing and

328 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Register Summary32581C28h-2Bh 32 R/W Miscellaneous Register 00001400h Page 3362Ch-2F

AMD Geode™ SC3200 Processor Data Book 329Video Processor Module - Register Summary32581CTable 7-5. F4BAR2: VIP Support Registers SummaryF4BAR2+MemoryO

AMD Geode™ SC3200 Processor Data Book 33Signal Definitions 32581CF29 TDI I(PU22.5)INPCIVIO---F30 GTEST I(PD22.5)INTVIO---F31 VPCKIN I INTVIO---G1 STOP

330 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581C7.3.2 Video Processor Registers - Functi

AMD Geode™ SC3200 Processor Data Book 331Video Processor Module - Video Processor Registers - Function 432581CIndex 3Dh Interrupt Pin Register (R/W) R

332 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581C7.3.2.1 Video Processor Support Register

AMD Geode™ SC3200 Processor Data Book 333Video Processor Module - Video Processor Registers - Function 432581C0 VID_EN (Video Enable). Enables video a

334 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581COffset 08h-0Bh Video X Position Register

AMD Geode™ SC3200 Processor Data Book 335Video Processor Module - Video Processor Registers - Function 432581COffset 14h-17h Video Color Key Register

336 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581COffset 28h-2Bh Miscellaneous Register (R

AMD Geode™ SC3200 Processor Data Book 337Video Processor Module - Video Processor Registers - Function 432581COffset 3Ch-3Fh Video Downscaler Control

338 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581COffset 4Ch-4Fh Video De-Interlacing and

AMD Geode™ SC3200 Processor Data Book 339Video Processor Module - Video Processor Registers - Function 432581C8 GFX_INS_VIDEO (Graphics Inside Video).

34 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CL29 GPIO35 I/O(PU22.5)INPCI, OPCIVIOPMR[14]4 = 0 and PMR[22]4 = 0 LAD3 I/O(PU22.5)INPC

340 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581COffset 60h-63h Alpha Window 1 X Position

AMD Geode™ SC3200 Processor Data Book 341Video Processor Module - Video Processor Registers - Function 432581COffset 70h-73h Alpha Window 2 X Position

342 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581COffset 80h-83h Alpha Window 3 X Position

AMD Geode™ SC3200 Processor Data Book 343Video Processor Module - Video Processor Registers - Function 432581COffset 90h-93h Video Request Register (R

344 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581COffset 420h-423h GenLock Register (R/W)

AMD Geode™ SC3200 Processor Data Book 345Video Processor Module - Video Processor Registers - Function 432581C7.3.2.2 VIP Support Registers - F4BAR2F4

346 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581C10 Auto-Flip. Video port operation mode.

AMD Geode™ SC3200 Processor Data Book 347Video Processor Module - Video Processor Registers - Function 432581C8 Video Data Capture Active. (Read Only)

348 AMD Geode™ SC3200 Processor Data BookVideo Processor Module - Video Processor Registers - Function 432581COffset 40h-43h VBI Data Odd Base Registe

AMD Geode™ SC3200 Processor Data Book 3498Debugging and Monitoring 32581C8.0Debugging and Monitoring8.1 Testability (JTAG)The Test Access Port (TAP) a

AMD Geode™ SC3200 Processor Data Book 35Signal Definitions 32581CR17 VSSGND --- --- ---R18 VSSGND --- --- ---R19 VSSGND --- --- ---R28 VSSGND --- ---

350 AMD Geode™ SC3200 Processor Data BookDebugging and Monitoring32581C

AMD Geode™ SC3200 Processor Data Book 3519Electrical Specifications 32581C9.0Electrical SpecificationsThis chapter provides information about:• Genera

352 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.1.4 Operating ConditionsTable 9-3 lists the various power supplies of the SC

AMD Geode™ SC3200 Processor Data Book 353Electrical Specifications 32581CTable 9-4 indicates which power rails are used for each signal of the SC3200

354 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.1.5.3 Definition of System Conditions for Measuring On ParametersThe SC3200’

AMD Geode™ SC3200 Processor Data Book 355Electrical Specifications 32581C9.1.6 Ball Capacitance and InductanceTable 9-8 gives ball capacitance and ind

356 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.1.7 Pull-Up and Pull-Down ResistorsThe following table lists input balls tha

AMD Geode™ SC3200 Processor Data Book 357Electrical Specifications 32581C9.2 DC CharacteristicsTable 9-10 describes the signal buffer types of the SC3

358 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.2.1 INAB DC Characteristics 9.2.2 INBTN DC Characteristics 9.2.3 INPCI DC Ch

AMD Geode™ SC3200 Processor Data Book 359Electrical Specifications 32581C9.2.4 INSTRP DC Characteristics 9.2.5 INT DC Characteristics 9.2.6 INTS DC Ch

36 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CW285MD57 I/O INT, TS2/5VIO---W29 SDCLK1 O O2/5VIO---W30 VSSGND --- --- ---W31 VIOPWR -

360 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.2.8 INUSB DC Characteristics Figure 9-1. Differential Input Sensitivity for

AMD Geode™ SC3200 Processor Data Book 361Electrical Specifications 32581C9.2.11 ODPCI DC Characteristics 9.2.12 Op/n DC Characteristics 9.2.13 OPCI DC

362 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3 AC CharacteristicsThe tables in this section list the following AC charact

AMD Geode™ SC3200 Processor Data Book 363Electrical Specifications 32581C9.3.1 Memory Controller InterfaceThe minimum input setup and hold times descr

364 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CTable 9-12. Memory Controller Timing ParametersSymbol Parameter Min Max Unit C

AMD Geode™ SC3200 Processor Data Book 365Electrical Specifications 32581CFigure 9-4. Memory Controller Output Valid Timing DiagramFigure 9-5. Read Dat

366 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.2 Video PortFigure 9-6. Video Input Port Timing DiagramTable 9-13. Video I

AMD Geode™ SC3200 Processor Data Book 367Electrical Specifications 32581C9.3.3 TFT Interface Figure 9-7. TFT Timing DiagramTable 9-14. TFT Timing Para

368 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.4 ACCESS.bus InterfaceThe following tables describe the timing for the ACC

AMD Geode™ SC3200 Processor Data Book 369Electrical Specifications 32581C Figure 9-8. ACB Signals: Rising Time and Falling Timing Diagram Figure 9-9.

AMD Geode™ SC3200 Processor Data Book 37Signal Definitions 32581CAE315MD28 I/O INT, TS2/5VIO---AF1 IRQ14 I INTS1VIOPMR[24] = 0TFTD1 O O1/4PMR[24] = 1A

370 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-10. ACB Start Condition Timing Diagram Figure 9-11. ACB Data Bit Timi

AMD Geode™ SC3200 Processor Data Book 371Electrical Specifications 32581C9.3.5 PCI Bus InterfaceThe SC3200 is compliant with PCI Bus Rev. 2.1 specific

372 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C Figure 9-13. V/I Curves for PCI Output SignalsPull-UpPull-DownTest Point VIO0

AMD Geode™ SC3200 Processor Data Book 373Electrical Specifications 32581CFigure 9-14. PCICLK Timing and Measurement PointsTable 9-18. PCI Clock Parame

374 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-15. Load Circuits for Maximum Time MeasurementsTable 9-19. PCI Timing

AMD Geode™ SC3200 Processor Data Book 375Electrical Specifications 32581C9.3.5.1 Measurement and Test ConditionsFigure 9-16. Output Timing Measurement

376 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-17. Input Timing Measurement ConditionsFigure 9-18. PCI Reset TimingV

AMD Geode™ SC3200 Processor Data Book 377Electrical Specifications 32581C9.3.6 Sub-ISA InterfaceAll output timing is guaranteed for 50 pF load, unless

378 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CtRDYA2IOCHRDY valid after IOR#/MEMR#/RD#/DOCR#/IOW#/MEMW#/WR#/DOCW# FE 8 M, I/

AMD Geode™ SC3200 Processor Data Book 379Electrical Specifications 32581C Figure 9-19. Sub-ISA Read Operation Timing DiagramtRDxtARxValidValidValid D

38 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CAJ12 CASA# O O2/5VIO---AJ13 BA0 O O2/5VIO---AJ14 MA10 O O2/5VIO---AJ155MD32 I/O INT, T

380 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C Figure 9-20. Sub-ISA Write Operation Timing DiagramtWRxtAWxValidValidValid Da

AMD Geode™ SC3200 Processor Data Book 381Electrical Specifications 32581C9.3.7 LPC InterfaceFigure 9-21. LPC Output Timing DiagramFigure 9-22. LPC Inp

382 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.8 IDE InterfaceFigure 9-23. IDE Reset Timing DiagramTable 9-23. IDE Genera

AMD Geode™ SC3200 Processor Data Book 383Electrical Specifications 32581CTable 9-24. IDE Register Transfer to/from Device Timing ParametersSymbol Para

384 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-24. Register Transfer to/from Device Timing DiagramADDR valid1WRITE R

AMD Geode™ SC3200 Processor Data Book 385Electrical Specifications 32581CTable 9-25. IDE PIO Data Transfer to/from Device Timing ParametersSymbol Para

386 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-25. PIO Data Transfer to/from Device Timing DiagramADDR valid1WRITE I

AMD Geode™ SC3200 Processor Data Book 387Electrical Specifications 32581CTable 9-26. IDE Multiword DMA Data Transfer Timing ParametersSymbol Parameter

388 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-26. Multiword DMA Data Transfer Timing DiagramtMtNtLtjtKtDtItEtZtFtGt

AMD Geode™ SC3200 Processor Data Book 389Electrical Specifications 32581CTable 9-27. IDE UltraDMA Data Burst Timing ParametersSymbol ParameterMode 0 M

AMD Geode™ SC3200 Processor Data Book 39Signal Definitions 32581CAL205MD44 I/O INT, TS2/5VIO---AL215MD40 I/O INT, TS2/5VIO---AL22 CKEA O O2/5VIO---AL2

390 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CAll timing parameters are measured at the connector of thedevice to which the

AMD Geode™ SC3200 Processor Data Book 391Electrical Specifications 32581CFigure 9-28. Sustained UltraDMA Data In Burst Timing DiagramtDStDHtDStDHtDHtD

392 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-29. Host Pausing an UltraDMA Data In Burst Timing DiagramtRPIDE_DATA[

AMD Geode™ SC3200 Processor Data Book 393Electrical Specifications 32581CFigure 9-30. Device Terminating an UltraDMA Data In Burst Timing DiagramIDE_D

394 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-31. Host Terminating an UltraDMA Data In Burst Timing DiagramIDE_DATA

AMD Geode™ SC3200 Processor Data Book 395Electrical Specifications 32581CFigure 9-32. Initiating an UltraDMA Data Out Burst Timing DiagramIDE_DATA[15:

396 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-33. Sustained UltraDMA Data Out Burst Timing DiagramtDStDHtDStDHtDHtD

AMD Geode™ SC3200 Processor Data Book 397Electrical Specifications 32581CFigure 9-34. Device Pausing an UltraDMA Data Out Burst Timing DiagramtRPIDE_D

398 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-35. Host Terminating an UltraDMA Data Out Burst Timing DiagramIDE_DAT

AMD Geode™ SC3200 Processor Data Book 399Electrical Specifications 32581CFigure 9-36. Device Terminating an UltraDMA Data Out Burst Timing DiagramIDE_

4 AMD Geode™ SC3200 Processor Data BookContents32581C6.0 Core Logic Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

40 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CTable 3-3. BGU481 Ball Assignment - Sorted Alphabetically by Signal Name Signal Name B

400 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.9 Universal Serial Bus (USB) InterfaceTable 9-28. USB Timing Parameters Sy

AMD Geode™ SC3200 Processor Data Book 401Electrical Specifications 32581CtUSB_DJU22Source differential driver jitter for paired transactions–150 150 n

402 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-37. Data Signal Rise and Fall Timing DiagramFigure 9-38. Source Diffe

AMD Geode™ SC3200 Processor Data Book 403Electrical Specifications 32581CFigure 9-39. EOP Width Timing DiagramFigure 9-40. Receiver Jitter Tolerance T

404 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.10 Serial Port (UART)Figure 9-41. UART, Sharp-IR, SIR, and Consumer Remote

AMD Geode™ SC3200 Processor Data Book 405Electrical Specifications 32581C9.3.11 Fast IR PortFigure 9-42. Fast IR (MIR and FIR) Timing DiagramTable 9-3

406 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.12 Parallel Port InterfaceFigure 9-43. Standard Parallel Port Typical Data

AMD Geode™ SC3200 Processor Data Book 407Electrical Specifications 32581CFigure 9-44. Enhanced Parallel Port Timing DiagramTable 9-32. Enhanced Parall

408 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.12.1 Extended Capabilities Port (ECP)Figure 9-45. ECP Forward Mode Timing

AMD Geode™ SC3200 Processor Data Book 409Electrical Specifications 32581CFigure 9-46. ECP Reverse Mode Timing DiagramTable 9-34. ECP Reverse Mode Timi

AMD Geode™ SC3200 Processor Data Book 41Signal Definitions 32581CF_STOP# U29F_TRDY# U30FP_VDD_ON V30, AB1FPCI_MON A4FPCICLK B18FRAME# D8GNT0# C5GNT1#

410 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.13 Audio Interface (AC97)Figure 9-47. AC97 Reset Timing DiagramFigure 9-48

AMD Geode™ SC3200 Processor Data Book 411Electrical Specifications 32581CFigure 9-49. AC97 Clocks DiagramTable 9-37. AC97 Clocks ParametersSymbol Para

412 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-50. AC97 Data TIming DiagramTable 9-38. AC97 I/O Timing ParametersSym

AMD Geode™ SC3200 Processor Data Book 413Electrical Specifications 32581CFigure 9-51. AC97 Rise and Fall Timing DiagramTable 9-39. AC97 Signal Rise an

414 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581CFigure 9-52. AC97 Low Power Mode Timing DiagramTable 9-40. AC97 Low Power Mode

AMD Geode™ SC3200 Processor Data Book 415Electrical Specifications 32581C9.3.14 Power Management InterfaceLED# Cycle time: 1 s ± 0.1 s, 40%-60% duty c

416 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.15 Power-Up SequencingFigure 9-55. Power-Up Sequencing With PWRBTN# Timing

AMD Geode™ SC3200 Processor Data Book 417Electrical Specifications 32581CFigure 9-56. Power-Up Sequencing Without PWRBTN# Timing DiagramACPI is non-fu

418 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C9.3.16 JTAG InterfaceFigure 9-57. TCK Measurement Points and Timing DiagramTab

AMD Geode™ SC3200 Processor Data Book 419Electrical Specifications 32581C Figure 9-58. JTAG Test Timing DiagramTCKt8InputOutput TDOTDI,t11t13t9t7t6t12

42 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CMD33 AJ16MD34 AH16MD35 AK17MD36 AJ17MD37 AH17MD38 AL17MD39 AL18MD40 AL21MD41 AH20MD42

420 AMD Geode™ SC3200 Processor Data BookElectrical Specifications32581C

AMD Geode™ SC3200 Processor Data Book 42110Package Specifications 32581C10.0Package Specifications10.1 Thermal Characteristics The junction-to-case th

422 AMD Geode™ SC3200 Processor Data BookPackage Specifications32581C10.1.1 Heatsink ConsiderationsTable 10-2 on page 421 shows the maximum allowed th

AMD Geode™ SC3200 Processor Data Book 423Package Specifications 32581C10.2 Physical DimensionsThe figures in this section provide the mechanical packa

424 AMD Geode™ SC3200 Processor Data BookPackage Specifications32581CFigure 10-3. BGU481 Package - Bottom View

AMD Geode™ SC3200 Processor Data Book 425Appendix A: Support Documentation 32581CAppendix ASupport DocumentationA.1 Order InformationOrdering Part Nu

426 AMD Geode™ SC3200 Processor Data BookAppendix A: Data Book Revision History32581CA.2 Data Book Revision HistoryThis document is a report of the re

AMD Geode™ SC3200 Processor Data Book 427Appendix A: Data Book Revision History 32581CC(February 2007)Table 9-3 "Operating Conditions" on pa

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AMD Geode™ SC3200 Processor Data Book 43Signal Definitions 32581CVIO (Total of 46) A2, A12, A30, B2, B13, B16, B19, B31, C3, C7, C10, C13, C22, C25, C

44 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581C3.2 Strap OptionsSeveral balls are read at power-up that set up the state ofthe SC3200

AMD Geode™ SC3200 Processor Data Book 45Signal Definitions 32581C3.3 Multiplexing ConfigurationThe tables that follow list multiplexing options and th

46 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CGPIO ACCESS.busN29 GPIO12 PMR[19] = 0 AB2C PMR[19] = 1M29 GPIO13 AB2DGPIO UARTAG1 GPIO

AMD Geode™ SC3200 Processor Data Book 47Signal Definitions 32581CV31 GPIO16 PMR[0] = 0 and FPCI_MON = 0PC_BEEP PMR[0] = 1 = 0 and FPCI_MON = 0F_DEVSEL

48 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CTable 3-7. Four-Signal/Group MultiplexingBall No.Default Alternate1 Alternate2 Alterna

AMD Geode™ SC3200 Processor Data Book 49Signal Definitions 32581C3.4 Signal DescriptionsInformation in the tables that follow may have duplicate infor

AMD Geode™ SC3200 Processor Data Book 5List of Figures 32581CList of FiguresFigure 1-1. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . .

50 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CX32I AJ2 I/O Crystal Connections. Connected directly to a 32.768 KHz crystal. This clo

AMD Geode™ SC3200 Processor Data Book 51Signal Definitions 32581CDQM7 AB31 O Data Mask Control Bits. During memory read cycles, these outputs control

52 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581C3.4.4 TFT Interface Signals Signal Name Ball No. Type Description MuxHSYNC A11 O Horiz

AMD Geode™ SC3200 Processor Data Book 53Signal Definitions 32581C3.4.6 PCI Bus Interface Signals Signal Name BalL No. Type Description MuxPCICLK A7 I

54 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CFRAME# D8 I/O Frame Cycle. Frame is driven by the current master to indicate the begin

AMD Geode™ SC3200 Processor Data Book 55Signal Definitions 32581CLOCK# H3 I/O Lock Operation. LOCK# indicates an atomic operation that may require mul

56 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CREQ1# A5 I Request Lines. REQ[1:0]# indicate to the arbiter that an agent requires the

AMD Geode™ SC3200 Processor Data Book 57Signal Definitions 32581C3.4.7 Sub-ISA Interface Signals Signal Name Ball No. Type Description MuxA[23:0] See

58 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581C3.4.8 Low Pin Count (LPC) Bus Interface Signals Signal Name Ball No. Type Description

AMD Geode™ SC3200 Processor Data Book 59Signal Definitions 32581CIDE_IORDY0 AD1 I I/O Ready Channels 0 and 1. When de-asserted, these signals extend t

6 AMD Geode™ SC3200 Processor Data BookList of Figures32581CFigure 7-6. Capture Video Mode Weave Example Using Two Video Frame Buffers . . . . . . . .

60 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581C3.4.11 Serial Ports (UARTs) Interface Signals Signal Name Ball No. Type Description M

AMD Geode™ SC3200 Processor Data Book 61Signal Definitions 32581C3.4.12 Parallel Port Interface Signals Signal Name Ball No. Type Description MuxACK#

62 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581CSTB#/WRITE# A22 O Data Strobe. When low, indicates to the printer that valid data is a

AMD Geode™ SC3200 Processor Data Book 63Signal Definitions 32581C3.4.14 AC97 Audio Interface Signals Signal Name Ball No. Type Description MuxBIT_CLK

64 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581C3.4.15 Power Management Interface Signals Signal Name Ball No. Type Description MuxCL

AMD Geode™ SC3200 Processor Data Book 65Signal Definitions 32581C3.4.16 GPIO Interface SignalsSignal Name Ball No. Type Description MuxGPIO0 D11 I/O

66 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581C3.4.17 Debug Monitoring Interface Signals Signal Name Ball No. Type Description MuxFPC

AMD Geode™ SC3200 Processor Data Book 67Signal Definitions 32581CTRST# E29 I JTAG Test Reset. This signal has an internal weak pull-up resistor.For no

68 AMD Geode™ SC3200 Processor Data BookSignal Definitions32581C3.4.20 Power, Ground and No Connections1Signal Name Ball No. Type DescriptionAVSSPLL2C

AMD Geode™ SC3200 Processor Data Book 694General Configuration Block 32581C4.0General Configuration BlockThe General Configuration block includes regi

AMD Geode™ SC3200 Processor Data Book 7List of Figures32581CFigure 9-47. AC97 Reset Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . .

70 AMD Geode™ SC3200 Processor Data BookGeneral Configuration Block32581C4.2 Multiplexing, Interrupt Selection, and Base Address RegistersThe register

AMD Geode™ SC3200 Processor Data Book 71General Configuration Block 32581C25 AC97CKEN (Enable AC97_CLK Output). This bit enables the output drive of A

72 AMD Geode™ SC3200 Processor Data BookGeneral Configuration Block32581C23 TFTPP (TFT/Parallel Port). Determines whether certain balls are used for T

AMD Geode™ SC3200 Processor Data Book 73General Configuration Block 32581C21 IOCSEL (Select I/O Commands). Selects ball functions. Ball # 0: I/O Comma

74 AMD Geode™ SC3200 Processor Data BookGeneral Configuration Block32581C12 TRDESEL (Select TRDE#). Selects ball function.Ball # 0: Sub-ISA Signal 1:

AMD Geode™ SC3200 Processor Data Book 75General Configuration Block 32581C16 Delay HSYNC. HSYNC delay by two TFT clock cycles. 0: There is no delay on

76 AMD Geode™ SC3200 Processor Data BookGeneral Configuration Block32581C 0 SDBE0 (Slave Disconnect Boundary Enable). Works in conjunction with the GX

AMD Geode™ SC3200 Processor Data Book 77General Configuration Block 32581C4.3 WATCHDOGThe SC3200 includes a WATCHDOG function to serve as afail-safe m

78 AMD Geode™ SC3200 Processor Data BookGeneral Configuration Block32581CWATCHDOG InterruptThe WATCHDOG interrupt (if configured and enabled) isrouted

AMD Geode™ SC3200 Processor Data Book 79General Configuration Block 32581C4.4 High-Resolution TimerThe SC3200 provides an accurate time value that can

8 AMD Geode™ SC3200 Processor Data BookList of Figures32581C

80 AMD Geode™ SC3200 Processor Data BookGeneral Configuration Block32581CTable 4-4. High-Resolution Timer RegistersBit DescriptionOffset 08h-0Bh TIMER

AMD Geode™ SC3200 Processor Data Book 81General Configuration Block 32581C4.5 Clock Generators and PLLsThis section describes the registers for the cl

82 AMD Geode™ SC3200 Processor Data BookGeneral Configuration Block32581C4.5.1 27 MHz Crystal Oscillator The internal oscillator employs an external c

AMD Geode™ SC3200 Processor Data Book 83General Configuration Block 32581C4.5.2 GX1 Module Core ClockThe core clock is generated by an Analog Delay Lo

84 AMD Geode™ SC3200 Processor Data BookGeneral Configuration Block32581C4.5.4 SuperI/O ClocksThe SuperI/O module requires a 48 MHz input for Fastinfr

AMD Geode™ SC3200 Processor Data Book 85General Configuration Block 32581C4.5.7 Clock RegistersTable 4-8 describes the registers of the clock generato

86 AMD Geode™ SC3200 Processor Data BookGeneral Configuration Block32581COffset 1Eh-1Fh Core Clock Frequency Control Register - CCFC (R/W) Reset Valu

AMD Geode™ SC3200 Processor Data Book 875SuperI/O Module 32581C5.0SuperI/O ModuleThe SuperI/O (SIO) module is a PC98 and ACPI compliantSIO that offers

88 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.1 FeaturesPC98 and ACPI Compliant• PnP Configuration Register structure• Flexible resou

AMD Geode™ SC3200 Processor Data Book 89SuperI/O Module 32581C5.2 Module ArchitectureThe SIO module comprises a collection of generic func-tional bloc

AMD Geode™ SC3200 Processor Data Book 9List of Tables 32581CList of TablesTable 2-1. SC3200 Memory Controller Register Summary . . . . . . . . . . . .

90 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.3 Configuration Structure / AccessThis section describes the structure of the configura

AMD Geode™ SC3200 Processor Data Book 91SuperI/O Module 32581CWrite accesses to unimplemented registers (i.e., accessingthe Data register while the In

92 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.4 Standard Configuration RegistersAs illustrated in Figure 5-4, the Standard Configurat

AMD Geode™ SC3200 Processor Data Book 93SuperI/O Module 32581CTable 5-3 provides the bit definitions for the Standard Con-figuration registers.• All r

94 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581CIndex 75h DMA Channel Select 1 (R/W)Indicates selected DMA channel for DMA 1 of the logic

AMD Geode™ SC3200 Processor Data Book 95SuperI/O Module 32581C5.4.1 SIO Control and Configuration RegistersTable 5-4 lists the SIO Control and Configu

96 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.4.2 Logical Device Control and ConfigurationAs described in Section 5.3.2 "Banked

AMD Geode™ SC3200 Processor Data Book 97SuperI/O Module 32581CTable 5-7. RTC Configuration RegistersBit DescriptionIndex F0h RAM Lock Register - RLR

98 AMD Geode™ SC3200 Processor Data BookSuperI/O Module32581C5.4.2.2 LDN 01h - System Wakeup ControlTable 5-8 lists registers that are relevant to the

AMD Geode™ SC3200 Processor Data Book 99SuperI/O Module 32581C5.4.2.3 LDN 02h - Infrared Communication Port or Serial Port 3Table 5-9 lists the config