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32 Electrical Data Chapter 7
AMD Sempron™ Processor Model 10 Data Sheet 31993A-1 September 2004
AMD Preliminary Information
7.10 General AC and DC Characteristics
Table 12 shows the AMD Sempron processor model 10 AC and
DC characteristics of the Southbridge, JTAG, test, and
miscellaneous pins.
Table 12. General AC and DC Characteristics
Symbol Parameter Description Condition Min Max Units Notes
V
IH
Input High Voltage
(V
CC_CORE
/ 2) +
200 mV
V
CC_CORE
+
300 mV
V 1, 2
V
IL
Input Low Voltage –300 350 mV 1, 2
V
OH
Output High Voltage
V
CC_CORE
–
400
V
CC_CORE
+
300
mV
V
OL
Output Low Voltage –300 400 mV
I
LEAK_P
Tristate Leakage Pullup
V
IN
= VSS
(Ground)
–1 mA
I
LEAK_N
Tristate Leakage Pulldown
V
IN
= V
CC_CORE
Nominal
600 µA
I
OH
Output High Current –6 mA 3
I
OL
Output Low Current 6 mA 3
T
SU
Sync Input Setup Time 2.0 ns 4, 5
T
HD
Sync Input Hold Time 0.0 ps 4, 5
Notes:
1. Characterized across DC supply voltage range.
2. Values specified at nominal V
CC_CORE
. Scale parameters between V
CC_CORE.
minimum and V
CC_CORE.
maximum.
3. I
OL
and I
OH
are measured at V
OL
maximum and V
OH
minimum, respectively.
4. Synchronous inputs/outputs are specified with respect to RSTCLK and RSTCK# at the pins.
5. These are aggregate numbers.
6. Edge rates indicate the range over which inputs were characterized.
7. In asynchronous operation, the signal must persist for this time to enable capture.
8. This value assumes RSTCLK period is 10 ns ==> TBIT = 2*fRST.
9. The approximate value for standard case in normal mode operation.
10. This value is dependent on RSTCLK frequency, divisors, Low Power mode, and core frequency.
11. Reassertions of the signal within this time are not guaranteed to be seen by the core.
12. This value assumes that the skew between RSTCLK and K7CLKOUT is much less than one phase.
13. This value assumes RSTCLK and K7CLKOUT are running at the same frequency, though the processor is capable of other
configurations.
14. Time to valid is for any open-drain pins. See requirements 7 and 8 in the “Power-Up Timing Requirements“ chapter for more
information.
- Data Sheet 1
- Table of Contents 3
- List of Figures 7
- List of Tables 9
- AMD Preliminary Information 10
- Revision History 11
- 1 Overview 13
- 31993A-1 September 2004 14
- 4 Overview Chapter 1 16
- 2 Interface Signals 17
- 2.3 Push-Pull (PP) Drivers 18
- 3 Logic Symbol Diagram 19
- 4 Power Management 21
- System Bus 26
- 4.3 Clock Control 30
- 5 CPUID Support 31
- 20 CPUID Support Chapter 5 32
- Specifications 33
- SYSCLK# AC Characteristics 34
- SKEW-DIFFEDGE 35
- 7 Electrical Data 37
- 7.6 Decoupling 39
- Characteristics 40
- 7.8 Absolute Ratings 42
- Threshold-DC 43
- Threshold-AC 43
- Chapter 7 Electrical Data 33 45
- 7.11 Open Drain Test Circuit 46
- SHUTDOWN 48
- SD_DELAY 48
- 38 Electrical Data Chapter 7 50
- 8.1 Power-Up Requirements 51
- 9 Mechanical Data 55
- Package Dimensions 56
- Chapter 9 Mechanical Data 45 57
- Chapter 9 Mechanical Data 47 59
- 48 Mechanical Data Chapter 9 60
- 10 Pin Descriptions 61
- AMD Sempron™ Processor 62
- Model 10 62
- Topside View 62
- Bottomside View 63
- 10.2 Pin List 71
- 1 0 RESERVED 83
- 1 1 133 MHz 83
- 0 1 166 MHz 83
- 0 0 200 MHz 83
- 11 Ordering Information 89
- Appendix A 91
- Thermal Diode Calculations 91
- Temperature Offset Correction 92
- Appendix B 95
- Conventions and 95
- Abbreviations 95
- Data Terminology 96
- Abbreviations and Acronyms 97
- Related Publications 101
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